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MAX9310AEUP 备选型号: PL138-48OC

MAX9310AEUP

Maxim Integrated

Clock Drivers & Distribution 1:5 Clock Driver

6 Weeks
表面贴装
20-TSSOP (0.173, 4.40mm Width)
YES
1GHz
-40°C~85°C
Tube
2002
e3
yes
活跃
1 (Unlimited)
20
EAR99
Fanout Buffer (Distribution), Multiplexer
Matte Tin (Sn)
3V~3.6V
DUAL
鸥翼
260
1
3.3V
0.65mm
未说明
MAX9310
LVDS
20
R-PDSO-G20
不合格
3.6V
3V
1
HSTL, LVPECL
2:5
Yes/Yes
0.6 ns
0.025 ns
6.5mm
4.4mm
ROHS3 Compliant
-
-
-
-
-
-
PL138-48OC

Microchip Technology

Clock Driver 2-IN LVPECL 20-Pin TSSOP Tube

8 Weeks
表面贴装
20-TSSOP (0.173, 4.40mm Width)
-
1GHz
0°C~70°C
Tube
2000
e3
-
活跃
3 (168 Hours)
20
-
Fanout Buffer (Distribution), Multiplexer
Matte Tin (Sn) - annealed
2.375V~3.63V
DUAL
鸥翼
260
1
2.5V
0.65mm
40
PL138
LVPECL
-
-
-
3.8V
2.375V
1
CML, HCSL, LVCMOS, LVDS, LVHSTL, LVPECL, SSTL
2:4
Yes/Yes
-
0.037 ns
6.5mm
-
ROHS3 Compliant
表面贴装
20
ALSO OPERATES AT -2.375 TO -3.8 V SUPPLY
4
890 ps
700 MHz
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