Lattice Semiconductor GAL20V8A-10LP

表面安装

NO

终端数量

24

Stranding element

无

Flame retardant

According to IEC/EN 60332-1-2

Permitted cable outer temperature after assembling without vibration

-50 - 90

Material core insulation

Rubber

Colour outer sheath

Black

Permitted cable outer temperature during assembling/handling

-40 - 90

Screen over stranding element

None

Core identification

Colour

Min. permitted bending radius, moving application with forced guidance

29.6

Nominal cross section conductor

25

Screen over stranding

None

Nominal voltage U0

450

Low smoke (according to EN 61034-2)

有

Nominal voltage U

750

Material outer sheath

Rubber

Conductor category

Class 5 = flexible

Package Description

PLASTIC, DIP-24

Package Style

IN-LINE

Package Body Material

PLASTIC/EPOXY

Package Equivalence Code

DIP24,.3

Supply Voltage-Nom

5 V

Supply Voltage-Min

4.75 V

Operating Temperature-Max

75 °C

Rohs Code

无

Manufacturer Part Number

GAL20V8A-10LP

Clock Frequency-Max

58.8 MHz

Package Code

DIP

Package Shape

RECTANGULAR

Manufacturer

Lattice Semiconductor Corporation

Part Life Cycle Code

Obsolete

Number of I/O Lines

8

Ihs Manufacturer

LATTICE SEMICONDUCTOR CORP

Supply Voltage-Max

5.25 V

Risk Rank

8.57

Part Package Code

DIP

JESD-609代码

e0

ECCN 代码

EAR99

端子表面处理

Tin/Lead (Sn85Pb15)

附加功能

8 MACROCELLS; 1 EXTERNAL CLOCK; REGISTER PRELOAD; SHARED INPUT/CLOCK

HTS代码

8542.39.00.01

子类别

可编程逻辑器件

技术

CMOS

端子位置

DUAL

终端形式

THROUGH-HOLE

端子间距

2.54 mm

Reach合规守则

not_compliant

引脚数量

24

JESD-30代码

R-PDIP-T24

输出的数量

8

资历状况

不合格

电源

5 V

温度等级

商业扩展

传播延迟

10 ns

建筑学

PAL-TYPE

输入数量

20

组织结构

12 DEDICATED INPUTS, 8 I/O

座位高度-最大

4.57 mm

可编程逻辑类型

EE PLD

输出功能

MACROCELL

专用输入数量

12

产品条款数量

64

宽度

7.62 mm

长度

31.855 mm