Lattice Semiconductor GAL22V10D-7LP

表面安装

NO

终端数量

24

Flame retardant

According to IEC/EN 60332-1-2

Permitted cable outer temperature after assembling without vibration

-30 - 80

Material core insulation

Polyvinyl chloride (PVC)

Conductor surface

Tinned

Permitted cable outer temperature during assembling/handling

-5 - 70

Outer diameter approx.

1.2

Core identification

Colour

Nominal voltage U0

0

Low smoke (according to EN 61034-2)

无

Core colour

Several

Nominal voltage U

0

Conductor category

Class 5 = flexible

Package Description

PLASTIC, DIP-24

Package Style

IN-LINE

Moisture Sensitivity Levels

1

Package Body Material

PLASTIC/EPOXY

Package Equivalence Code

DIP24,.3

Supply Voltage-Nom

5 V

Reflow Temperature-Max (s)

未说明

Supply Voltage-Min

4.75 V

Operating Temperature-Max

75 °C

Rohs Code

无

Manufacturer Part Number

GAL22V10D-7LP

Clock Frequency-Max

111 MHz

Package Code

DIP

Package Shape

RECTANGULAR

Manufacturer

Lattice Semiconductor Corporation

Part Life Cycle Code

Obsolete

Number of I/O Lines

10

Samacsys Description

SPLD - Simple Programmable Logic Devices 5V 22 I/O

Ihs Manufacturer

LATTICE SEMICONDUCTOR CORP

Supply Voltage-Max

5.25 V

Risk Rank

8.61

Part Package Code

DIP

JESD-609代码

e0

无铅代码

无

ECCN 代码

EAR99

端子表面处理

Tin/Lead (Sn85Pb15)

附加功能

10 MACROCELLS; SHARED INPUT/CLOCK

HTS代码

8542.39.00.01

子类别

可编程逻辑器件

技术

CMOS

端子位置

DUAL

终端形式

THROUGH-HOLE

峰值回流焊温度（摄氏度）

未说明

端子间距

2.54 mm

Reach合规守则

not_compliant

引脚数量

24

JESD-30代码

R-PDIP-T24

输出的数量

10

资历状况

不合格

电源

5 V

温度等级

商业扩展

传播延迟

7.5 ns

建筑学

PAL-TYPE

输入数量

22

组织结构

11 DEDICATED INPUTS, 10 I/O

座位高度-最大

5.334 mm

可编程逻辑类型

EE PLD

输出功能

MACROCELL

专用输入数量

11

产品条款数量

132

宽度

7.62 mm

长度

31.75 mm