NXP Semiconductors 5962-8985701EA

ECCN (US)

EAR99

Logic Family

F

Number of Elements per Chip

2

Number of Channels per Chip

6

Number of Inputs per Chip

6

Number of Input Enables per Chip

0

Number of Outputs per Chip

6

Number of Output Enables per Chip

2 Low

Bus Hold

无

Maximum Propagation Delay Time @ Maximum CL (ns)

7@5V

Absolute Propagation Delay Time (ns)

10

Process Technology

Bipolar

Input Signal Type

Single-Ended

Maximum Low Level Output Current (mA)

48

Maximum High Level Output Current (mA)

-12

Minimum Operating Supply Voltage (V)

4.5

Typical Operating Supply Voltage (V)

5

Maximum Operating Supply Voltage (V)

5.5

Propagation Delay Test Condition (pF)

50

Minimum Operating Temperature (°C)

-55

Maximum Operating Temperature (°C)

125

Standard Package Name

DIP

Supplier Package

CDIP

Mounting

通孔

PCB changed

16

Lead Shape

通孔

Schedule B

8542390000/8542390000/8542390000/8542390000/8542390000

RoHS

Compliant

零件状态

Obsolete

引脚数量

16

输出类型

3-State

极性

Non-Inverting

逻辑功能

Buffer/Line Driver

RoHS状态

供应商未确认