Renesas Electronics R5F5631EDDFB#V1

Family Name

RX

Instruction Set Architecture

CISC

Maximum CPU Frequency (MHz)

100

Maximum Clock Rate (MHz)

100

Data Bus Width (bit)

32

Data Memory Size

32KB

Maximum Expanded Memory Size

4GB

Programmability

有

Interface Type

CAN/I2C/SCI/SPI/USB

Number of I/Os

111

No. of Timers

7

Timers Resolution (bit)

8/16

Number of ADCs

Dual

ADC Resolution (bit)

12/12

Number of DAC's

Single

DAC Resolution (bit)

10

USART

0

UART

0

I2C

4

I2S

0

Watchdog

2

Parallel Master Port

无

Real Time Clock

有

Special Features

CAN控制器

Minimum Operating Supply Voltage (V)

2.7

Typical Operating Supply Voltage (V)

3.3

Maximum Operating Supply Voltage (V)

3.6

Minimum Operating Temperature (°C)

-40

Maximum Operating Temperature (°C)

85

Standard Package Name

QFP

Supplier Package

LFQFP

Mounting

表面贴装

Package Height

1.4

Package Length

20

Package Width

20

PCB changed

144

Lead Shape

Gull-wing

包装

Tray

引脚数量

144

内存大小

128KB

程序存储器类型

Flash

程序内存大小

2MB

数模转换器通道

2

核心架构

RX

以太网

0

USB

1

SPI,SPI

3

CAN

3

脉宽调制

1

ADC Channels

8/21

设备核心

RX

RoHS状态

供应商未确认