Renesas Electronics 74LV2GT125AUSE-E

ECCN (US)

EAR99

Logic Family

LV

Number of Elements per Chip

2

Number of Channels per Chip

2

Number of Inputs per Chip

2

Number of Input Enables per Chip

0

Number of Outputs per Chip

2

Number of Output Enables per Chip

1 Low

Bus Hold

无

Maximum Propagation Delay Time @ Maximum CL (ns)

7.5@5V|[email protected]

Absolute Propagation Delay Time (ns)

15

Process Technology

CMOS

Input Signal Type

Single-Ended

Maximum Low Level Output Current (mA)

12

Maximum High Level Output Current (mA)

-12

Minimum Operating Supply Voltage (V)

3

Typical Operating Supply Voltage (V)

3.3|5

Maximum Operating Supply Voltage (V)

5.5

Maximum Quiescent Current (uA)

10

Propagation Delay Test Condition (pF)

50

Maximum Power Dissipation (mW)

200

Minimum Operating Temperature (°C)

-40

Maximum Operating Temperature (°C)

85

Standard Package Name

SOP

Supplier Package

SSOP

Mounting

表面贴装

Package Height

0.7

Package Length

2

Package Width

2.3

PCB changed

8

Lead Shape

Gull-wing

Package

Tape & Reel (TR)

Base Product Number

74LV2GT125

厂商

Renesas Electronics America Inc

Product Status

Obsolete

包装

卷带

系列

-

零件状态

Obsolete

引脚数量

8

输出类型

3-State

极性

Non-Inverting

逻辑功能

Buffer/Line Driver

RoHS状态

符合RoHS标准