NXP Semiconductors 5962-8972301EA

ECCN (US)

EAR99

Logic Family

F

Latch Mode

Addressable

Number of Channels per Chip

8

Number of Elements per Chip

1

Number of Inputs per Chip

1

Number of Input Enables per Element

1

Number of Selection Inputs per Element

3

Number of Outputs per Chip

8

Number of Output Enables per Element

0

Bus Hold

无

Set/Reset

主复位

Maximum Propagation Delay Time @ Maximum CL (ns)

9@5V

Absolute Propagation Delay Time (ns)

14.5

Process Technology

Bipolar

Maximum Low Level Output Current (mA)

20

Maximum High Level Output Current (mA)

-1

Minimum Operating Supply Voltage (V)

4.5

Typical Operating Supply Voltage (V)

5

Maximum Operating Supply Voltage (V)

5.5

Propagation Delay Test Condition (pF)

50

Minimum Operating Temperature (°C)

-55

Maximum Operating Temperature (°C)

125

Supplier Temperature Grade

Military

Standard Package Name

DIP

Supplier Package

CDIP

Mounting

通孔

PCB changed

16

Lead Shape

通孔

Operating Temperature Classification

Military

Package Type

CDIP

Maximum Propagation Delay Time @ Maximum CL

9@5V

Operating Temp Range

-55C to 125C

Number of Elements

1

Operating Supply Voltage (Max)

5.5(V)

Operating Supply Voltage (Typ)

5(V)

Rad Hardened

无

Operating Supply Voltage (Min)

4.5(V)

零件状态

Obsolete

类型

D-Type

技术

Bipolar

引脚数量

16

输出的数量

8

极性

Non-Inverting

比特数

8

输入数量

1

高电平输出电流

-1(mA)

低水平输出电流

20(mA)

RoHS状态

供应商未确认