NXP Semiconductors 74LVC16373ADGG,512

PCB changed

48

ECCN (US)

EAR99

Latch Mode

Transparent

Logic Family

LVC

Maximum High Level Output Current (mA)

-24

Maximum Low Level Output Current (mA)

24

Process Technology

CMOS

Absolute Propagation Delay Time (ns)

14.4

Maximum Propagation Delay Time @ Maximum CL (ns)

2.4(Typ)@3.3V|2.9(Typ)@2.7V

Set/Reset

无

Bus Hold

无

Number of Output Enables per Element

1

Number of Outputs per Chip

16

Number of Selection Inputs per Element

0

Number of Input Enables per Element

1

Number of Inputs per Chip

16

Number of Elements per Chip

2

Number of Channels per Chip

16

Minimum Operating Temperature (°C)

-40

Propagation Delay Test Condition (pF)

50

Maximum Quiescent Current (uA)

80

Typical Quiescent Current (uA)

0.1

Tolerant I/Os (V)

5

Maximum Operating Supply Voltage (V)

3.6

Typical Operating Supply Voltage (V)

3.3|1.8|2.5

Minimum Operating Supply Voltage (V)

1.2

Mounting

表面贴装

Supplier Package

TSSOP

Maximum Operating Temperature (°C)

125

Package Length

12.6(Max)

Package Height

1.05(Max)

Package Width

6.2(Max)

零件状态

Obsolete

类型

D-Type

引脚数量

48

输出类型

3-State

极性

Non-Inverting

RoHS状态

符合RoHS标准