NXP Semiconductors 74LVC373APW,112

ECCN (US)

EAR99

HTS

8542.39.00.01

Logic Family

LVC

Latch Mode

Transparent

Number of Channels per Chip

8

Number of Elements per Chip

1

Number of Inputs per Chip

8

Number of Input Enables per Element

1

Number of Selection Inputs per Element

0

Number of Outputs per Chip

8

Number of Output Enables per Element

1

Bus Hold

无

Set/Reset

无

Maximum Propagation Delay Time @ Maximum CL (ns)

3.4(Typ)@2.7V|2.9(Typ)@3.3V

Absolute Propagation Delay Time (ns)

20.3

Process Technology

CMOS

Maximum Low Level Output Current (mA)

24

Maximum High Level Output Current (mA)

-24

Minimum Operating Supply Voltage (V)

1.2

Typical Operating Supply Voltage (V)

1.8|2.5|3.3

Maximum Operating Supply Voltage (V)

3.6

Tolerant I/Os (V)

5

Typical Quiescent Current (uA)

0.1

Maximum Quiescent Current (uA)

40

Propagation Delay Test Condition (pF)

50

Minimum Operating Temperature (°C)

-40

Maximum Operating Temperature (°C)

125

Standard Package Name

SOP

Supplier Package

TSSOP

Mounting

表面贴装

Package Height

0.95(Max)

Package Length

6.6(Max)

Package Width

4.5(Max)

PCB changed

20

Lead Shape

Gull-wing

Package

Bulk

Base Product Number

74LVC373

厂商

恩智浦半导体

Product Status

活跃

包装

Bulk

系列

*

零件状态

活跃

类型

D-Type

引脚数量

20

输出类型

3-State

极性

Non-Inverting

RoHS状态

符合RoHS标准